Question

Problem 4 (25 points)Consider a byte addressing architecture with 64-bit memory addresses.(a)Which bits of the address would be used in the tag, index and offset in a direct-mapped cache with 512 1-word blocks. 3(b)Which bits of the address would be used in the tag, index and offset in a direct-mapped cache with 64 8-word blocks.(c)What is the ratio of bits used for storing data to total bits stored in the cache in each of the above cases

Answer 1

Answer:

Following are the solution to the given points:

Explanation:

The Memory address value = 64 bit

The Size of the word $= \frac{64}{8} =8 \ Byte$

In point a:

The offset size $= 3\ bits$ ( in 1-word block size)  

The Index size $= 9 \ bits$ (as block number =512)  

Tag size $= 64 - 12 = 52\ bits$

In point b:

The offset size $= 8 \times 8 \ bytes = 2^6 = 6 \ bits.$

The Index size $= 64 \ bits = 2^6 \ =6 \ bits$

Tag size  $= 64 - 12 = 52\ bits$

In point c:

The Ratio at point a  

$\to 3:64$

The Ratio at point b

$\to 6:64$