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Dimas [21]
3 years ago
7

Design a ROM of size 64X8 bit in VHDL. Your ROM takes as input an address and a clock and output the content of the ROM at the c

orresponding input address on the rising edge of the clock. (2 Pts)

Computers and Technology
1 answer:
Kryger [21]3 years ago
7 0

Answer:

Number of Address lines to address all locations of 64x8 ROM

log₂(64) = log₂2⁶ = 6

Number  of address lines Required = 6

Number of bits in each location = 8

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