to a clock cycle in which the processor fetches the following instruction word:
10101100100001010000000000010100
Assume that the data memory is all zeros and that the processor’s registers have the following values at the beginning of the cycle in which the above instruction word is fetched:
R0 R1 R2 R3 R4 R5 R6 R8 R12 R31
0 1 -2 3 -4 5 -6 -8 -12 31
a, What are the outputs of the sign-extend and the jump "Shift-Left-2" (near the top of Figure 4.24) for this instruction word?
b, What are the values of ALU control unit’s inputs (ALUOp and Instruction operation) for this instruction?
c, What is the new PC address after this instruction is executed? Highlight the path through which this value is determined.
d, For the ALU and the two add units, what are their data input values?
e, What are the values of all inputs for the "Registers" unit?