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Anika [276]
3 years ago
5

Type the correct answer in the box. Spell all words correctly.

Computers and Technology
1 answer:
Nimfa-mama [501]3 years ago
3 0

Answer:

Traffic

Explanation:

You might be interested in
A software program that allows a programmer to type in code. modern versions usually make it easy to format the code on the scre
Daniel [21]
Hi!

Software programs which programmers use to write code are known as IDE's. IDE stands for an integrated development environment.

It is also sometimes called an interactive development environment.

Hopefully, this helps!
4 0
3 years ago
A nonpipelined system takes 300ns to process a task. The same task can be processed in a 5-segment pipeline with a clock cycle o
Vladimir79 [104]

Answer:

Pipelined architecture is 1.667 times more speedy than non pipelined architecture.

Explanation:

There are five stages to to complete an instruction to execute in pipeline architecture. as

Stage 1:  Instruction Fetch

Stage 2: Instruction Decode

Stage 3: Execute

Stage 4: Memory Access

Stage 5 : Write Back

The pipeline architecture processed instruction as given below. Each Stage take 1 clock cycle, which is represented as CC.

                Stage 1           Stage 2         Stage 3         Stage 4            Stage 5

I1:              1cc                  2cc                 3cc                4cc                   5cc

I2              2cc                 3cc                  4cc               5cc                   6cc

I3              3cc                  4cc                 5cc              6cc                    7cc

I4              4cc                 5cc                  6cc              7cc                    8cc

each four Instructions set takes 8 Clock Cycles.

I5              9cc                  10cc                11cc               12cc                 13cc

I6              10cc                 11cc                  12cc             13cc                 14cc

I7              11cc                  12cc                 13cc              14cc                 15cc

I8              12cc                 13cc                  14cc              15cc                16cc

.

.

.

I97:             193cc            194cc              195cc              196cc               197cc

I98             194cc             195cc             196cc               197cc               198cc

I99            195cc             196cc              197cc              198cc               199cc

I100         196cc                197cc             198cc            199cc                 200cc

<u>Pipelined architecture Time Calculation</u>

So in pipeline architecture 100 instructions takes 200 clock cycles to execute.

1 Clock Cycle time period is = 60ns.

200 Clock Cycle =  60ns * 200 = 12000 ns

<u>Non Pipelined architecture Time Calculation</u>

1 task Time period= 300ns

100 task time period = 100 * 300 =  30000 ns

The difference between pipelined and non pipelined architecture time period is = 30000 - 12000 = 18000 ns

<u>Speedup ratio</u>

<em>Speed up ratio= 30000/18000 =  1.667</em>

7 0
3 years ago
One last question
BlackZzzverrR [31]

Answer:

I love Chipotle!

Explanation:

I don't know, maybe because the food there is really good.

8 0
3 years ago
Read 2 more answers
Explain SATA peripheral bus operation?
grin007 [14]
Peripheral Bus is not associated with the SATA function on a computer as they are not universal to each other. If you can go more into context, that would be great.
3 0
3 years ago
Consider a classful IPv4 address 200.200.200.200? What is its implied subnet mask? If we take the same address and append the CI
topjm [15]

Answer:

a. 255.255.255.0 (class C)

b. 255.255.255.224

Explanation:

Here, we want to give the implied subnet mask of the given classful IPV4 address

We proceed as follows;

Given IPv4 address: 200.200.200.200

Classes

Class A : 0.0.0.0 to 127.255.255.255

Class B: 128.0.0.0 to 191.255.255.255

Class C: 192.0.0.0 to 223.255.255.255

Class D: 224.0.0.0 to 239.255.255.255

so 200.200.200.200 belongs to Class C and it's subnet mask is 255.255.255.0

In CIDR(Classless Inter Domain Routing)

subnet /27 bits means 27 1s and 5 0s. so subnet

i.e 11111111.11111111.11111111.11100000 which in dotted decimal format is 255.255.255.224 .

4 0
3 years ago
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