Answer:
The answer is The Cache Sets (S) = 32, Tag bits (t)=24, Set index bits(s) = 5 and Block offset bits (b) = 3
Explanation:
Solution
Given Data:
Physical address = 32 bit (memory address)
Cache size = 1024 bytes
Block size = 8 bytes
Now
It is a 4 way set associative mapping, so the set size becomes 4 blocks.
Thus
Number of blocks = cache size/block size
=1024/8
=128
The number of blocks = 128
=2^7
The number of sets = No of blocks/set size
=128/4
= 32
Hence the number of sets = 32
←Block ←number→
Tag → Set number→Block offset
←32 bit→
Now, =
The block offset = Log₂ (block size)
=Log₂⁸ = Log₂^2^3 =3
Then
Set number pc nothing but set index number
Set number = Log₂ (sets) = log₂³² =5
The remaining bits are tag bits.
Thus
Tag bits = Memory -Address Bits- (Block offset bits + set number bits)
= 32 - (3+5)
=32-8
=24
So,
Tag bits = 24
Therefore
The Cache Sets = 32
Tag bits =24
Set index bits = 5
Block offset bits = 3
Note: ←32 bits→
Tag 24 → Set index 5→Block offset 3
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