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3 years ago

A. The <hr> tag is an ______ element

Computers and Technology

2 answers:

Orlov [11]3 years ago

7 0

Explanation:

join meeting .......now

zavuch27 [327]3 years ago

4 0

The element is used to represent a thematic break between paragraph-level elements. It is typically rendered as a horizontal line.

Read more: https://html.com/tags/hr/#ixzz6nqIyUV74

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Suppose a host has a 1-MB file that is to be sent to another host. The file takes 1 second of CPU time to compress 50%, or 2 sec

kozerog [31]

Answer: bandwidth = 0.10 MB/s

Explanation:

Given

Total Time = Compression Time + Transmission Time

Transmission Time = RTT + (1 / Bandwidth) xTransferSize

Transmission Time = RTT + (0.50 MB / Bandwidth)

Transfer Size = 0.50 MB

Total Time = Compression Time + RTT + (0.50 MB /Bandwidth)

Total Time = 1 s + RTT + (0.50 MB / Bandwidth)

Compression Time = 1 sec

Situation B:

Total Time = Compression Time + Transmission Time

Transmission Time = RTT + (1 / Bandwidth) xTransferSize

Transmission Time = RTT + (0.40 MB / Bandwidth)

Transfer Size = 0.40 MB

Total Time = Compression Time + RTT + (0.40 MB /Bandwidth)

Total Time = 2 s + RTT + (0.40 MB / Bandwidth)

Compression Time = 2 sec

Setting the total times equal:

1 s + RTT + (0.50 MB / Bandwidth) = 2 s + RTT + (0.40 MB /Bandwidth)

As the equation is simplified, the RTT term drops out(which will be discussed later):

1 s + (0.50 MB / Bandwidth) = 2 s + (0.40 MB /Bandwidth)

Like terms are collected:

(0.50 MB / Bandwidth) - (0.40 MB / Bandwidth) = 2 s - 1s

0.10 MB / Bandwidth = 1 s

Algebra is applied:

0.10 MB / 1 s = Bandwidth

Simplify:

0.10 MB/s = Bandwidth

The bandwidth, at which the two total times are equivalent, is 0.10 MB/s, or 800 kbps.

(2) . Assume the RTT for the network connection is 200 ms.

For situtation 1:

Total Time = Compression Time + RTT + (1/Bandwidth) xTransferSize

Total Time = 1 sec + 0.200 sec + (1 / 0.10 MB/s) x 0.50 MB

Total Time = 1.2 sec + 5 sec

Total Time = 6.2 sec

For situation 2:

Total Time = Compression Time + RTT + (1/Bandwidth) xTransferSize

Total Time = 2 sec + 0.200 sec + (1 / 0.10 MB/s) x 0.40 MB

Total Time = 2.2 sec + 4 sec

Total Time = 6.2 sec

Thus, latency is not a factor.

5 0

3 years ago

Add a clause for identifying the sibling relationship. The predicate on the left handside of the rule should be sibling(X, Y), s

jolli1 [7]

Answer:

following are the solution to this question:

Explanation:

For Siblings (X,Y);

Alice(X),

Edward(Y),

parent(Edward,Victoria,Albert) //Albert is the father F

parent(Alice,Victoria,Albert) //Victoria is the Mother M

Therefore,

X is siblings of Y when;

X is the mother M and father is F, and Y is the same mother and father as X does, and satisfing the given condition.

It can be written as the following prolog rule:

Siblings_of(X,Y):

parents(X,M,F)

parents(Y,M,F)

Siblings_of(X,Y): parents(X,M,F), parents(Y,M,F)

|? - sibling_of(alice,edward).

yes

|? - Sibling_of(alice,X).

X=Edward

|? - Sibling_of(alice,alice).

yes

5 0

3 years ago

The type of line shown below represents an / a:

VikaD [51]

Answer:

esrfsrtg

Explanation:

6 0

3 years ago

Given the class definition: class CreateDestroy { public: CreateDestroy() { cout << "constructor called, "; } ~CreateDestr

Vilka [71]

Answer:

(A)constructor called, destructor called, constructor called, destructor called.

Explanation:

In the class definition we have created a constructor which prints constructor called and a destructor which prints destructor called.Since the class contains default constructors and destructors but when we define constructor and destructor in the class defaults are removed from the class.In the code the loop is running 2 times creating a object so constructor is called when that iteration finishes it deletes that object so destructor is called and it is happening 2 times.

5 0

3 years ago

True / False<br> Generally, more orthogonal instruction sets are considered less elegant.

Cerrena [4.2K]

Answer: True

Explanation:Orthogonal instruction set is the set of instruction that can use can use all addressing mode. They have independent working and so instruction can use any register the prefer and this leads to overlapping in instruction and complexity.

When RISC architecture got introduced ,it got more preference due to reduced instruction and less complexity as compared to orthogonal instruction.So it not considered elegant to have more orthogonal instruction.

6 0

3 years ago

A. The <hr> tag is an ______ element​

A. The <hr> tag is an ______ element