Answer:
A. 4 CPUs and 6 megabyte cache memory
B. 1.3157 x10^-9 nanoseconds
Explanation:
The Intel core i5 7500 is a seventh generation central processing unit with a 4 CPU core and a 6 megabyte cache memory. It executes task at a clock cycle of 5 clock cycle at a speed of 3.8 GHz.
The relationship between frequency and clock cycle is,
Clock cycle = 1 / ( frequent).
So, One clock cycle = 1 / 3.8 GHz
= 0.3 x10^-9
For five clock cycles = 5 x 0.3 x10^-9
= 1.3157 x10^-9 nanoseconds.
Answer:
struct node{
student data;
node* next;
};
Explanation:
The above written is the segment of code is the structure of node of the linked list.The data of the node is type student.So the data of the node of the linked list will consist of the student details and the next is the pointer which holds the address of the next node.
Answer:
I'm a beginner but I go you!
Explanation:
