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denpristay [2]
3 years ago
15

Technician A says that S-cams can be left or right handed. Technician B says that S-cam foundation brakes can have one or two an

chors. Who is correct? Technician A , Technician B , Both Technician A and Technician B , Neither Technician A nor Technician B
Computers and Technology
1 answer:
wariber [46]3 years ago
3 0

Answer: technician A

Explanation:

You might be interested in
What is the output of the following function call? //function body int factorial(int n) { int product=0; while(n > 0) { produ
maks197457 [2]

Answer:

zero

Explanation:

Because of the define the product variable is zero.

when the function call with pass by value 4.

The program control moves to that function, after that product

store the value zero. Then, product is multiply with n which become zero

because 0 * n is zero and store in the product again.

after that, n'' is wrong it must be 'n--' for performing the factorial function.

after that, the value of n is 3, again loop execute because condition n > 0

is true.

again zero multiply with n and become zero.

this process repeated until condition false and finally the output is zero.

Correction:

To make the code working:

change product = 1 instead of zero.

and change n-- in place of n''.  

5 0
3 years ago
Discuss the DMA process​
shusha [124]

Answer:

Direct memory access (DMA) is a process that allows an input/output (I/O) device to send or receive data directly to or from the main memory, bypassing the CPU to speed up memory operations and this process is managed by a chip known as a DMA controller (DMAC).

Explanation:

A defined portion of memory is used to send data directly from a peripheral to the motherboard without involving the microprocessor, so that the process does not interfere with overall computer operation.

In older computers, four DMA channels were numbered 0, 1, 2 and 3. When the 16-bit industry standard architecture (ISA) expansion bus was introduced, channels 5, 6 and 7 were added.

ISA was a computer bus standard for IBM-compatible computers, allowing a device to initiate transactions (bus mastering) at a quicker speed. The ISA DMA controller has 8 DMA channels, each one of which associated with a 16-bit address and count registers.

ISA has since been replaced by accelerated graphics port (AGP) and peripheral component interconnect (PCI) expansion cards, which are much faster. Each DMA transfers approximately 2 MB of data per second.

A computer's system resource tools are used for communication between hardware and software. The four types of system resources are:

  •    I/O addresses
  •    Memory addresses.
  •    Interrupt request numbers (IRQ).
  •    Direct memory access (DMA) channels.

DMA channels are used to communicate data between the peripheral device and the system memory. All four system resources rely on certain lines on a bus. Some lines on the bus are used for IRQs, some for addresses (the I/O addresses and the memory address) and some for DMA channels.

A DMA channel enables a device to transfer data without exposing the CPU to a work overload. Without the DMA channels, the CPU copies every piece of data using a peripheral bus from the I/O device. Using a peripheral bus occupies the CPU during the read/write process and does not allow other work to be performed until the operation is completed.

With DMA, the CPU can process other tasks while data transfer is being performed. The transfer of data is first initiated by the CPU. The data block can be transferred to and from memory by the DMAC in three ways.

In burst mode, the system bus is released only after the data transfer is completed. In cycle stealing mode, during the transfer of data between the DMA channel and I/O device, the system bus is relinquished for a few clock cycles so that the CPU can perform other tasks. When the data transfer is complete, the CPU receives an interrupt request from the DMA controller. In transparent mode, the DMAC can take charge of the system bus only when it is not required by the processor.

However, using a DMA controller might cause cache coherency problems. The data stored in RAM accessed by the DMA controller may not be updated with the correct cache data if the CPU is using external memory.

Solutions include flushing cache lines before starting outgoing DMA transfers, or performing a cache invalidation on incoming DMA transfers when external writes are signaled to the cache controller.

4 0
3 years ago
Read 2 more answers
Call of duty vanguard, war zone , fornite, gta what’s your favorite
tia_tia [17]
Warzone easily but gta a close second
8 0
3 years ago
Sixteen stations, numbered 1 through 16, are contending for the use of a shared channel by using the adaptive tree walk protocol
Ksivusya [100]

Answer:

11 bit slot will be needed

Explanation:

The number of prime numbers between 1 through 16

= 2, 3 , 5, 7, 11 and 13

hence we can say 6 stations are to use the shared channel

Given that all the stations are ready simultaneously

The number of bit slots that will be needed to handle the contention will be 11 bits :

slot 1 : 2, 3, 5 , 7, 11 , 13

slot 2 : 2,3, 5, 7

slot 3 : 2, 3

slot 4 : 2 .   slot 5 : 3 .  slot 6 : 5,7.   slot 7 : 5 .   slot 8 : 7.  slot 9: 11,13.  

slot 10 : 11.   slot 11 : 13

8 0
3 years ago
Why is body language an important factor in a business meeting
slava [35]

The importance of the body language in business. Body language is a language without spoken words, it is called non verbal communication. We use it all the time in our social life and business life so it is all about gestures movements and expressions made by people to deliver a specific message to other people. Business meetings are all about making a good impression.

5 0
3 years ago
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