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Stella [2.4K]
3 years ago
8

Some architectures support the ‘memory indirect’ addressing mode. Below is an example. In this case, the register R2contains a p

ointer to a pointer. Two memory accesses are required to load the data. ADD R3, @(R2)The MIPS CPU doesn’t support this addressing mode. Write a MIPS code that’s equivalent to the instruction above. The pointer-to-pointer is in register $t1. The other data is in register $t4.

Computers and Technology
1 answer:
egoroff_w [7]3 years ago
7 0

Answer:

Following is given the solution to question I hope it will  make the concept easier!

Explanation:

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