It is the ALU. However, keep in mind that registers and buses do a very important task. The number of registers we have, faster is the processing, and the opposite is true as well. And there is a reason behind this if we have different channels for sending and receiving the data from the memory, and several registers for storing the data, and we can formulate the requirement seeing the requirements for full adder and half adders. Remember we need to store several variables in case of the full adder, and which is the carry, and if we have separate registers for each of them, our task becomes easier. Remember its the CU that tells the ALU what operation is required to be performed. Also remember we have the same channel for input and output in the case of Van Neumann architecture, as we have a single bus. and we also have a single shared memory. And Harvard architecture is an advanced version of it.
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