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borishaifa [10]
2 years ago
9

What is the slope??

Mathematics
2 answers:
Mariana [72]2 years ago
5 0

Answer:

m= 3/6 or 1/2

Step-by-step explanation:

First you have to pick two points from the line, it is could any two points

I picked (-6,0) and (0,3)

Slope=  y2 - y1 / x2 - x1

Now you should pick which one is point 1 and which one is point 2, any point could the first or the second, so it is your choice

point 1; (-6,0)

point 2: (0,3)

now substitute for X and Y

3-0/0-(-6)= m

3/0+6=m when there is two negative symbol them the symbol will turn positive, so you add 6 and 0

m=3/6 or 1/2

goldenfox [79]2 years ago
3 0
-2/4
Move down 2 and to the right 4 times
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Memory module consists of 9 chips. The device is designed with redundancy so that it works even if one of its chips is defective
soldier1979 [14.2K]

Answer:

a) P[C]=p^n

b) P[M]=p^{8n}(9-8p^n)

c) n=62

d) n=138

Step-by-step explanation:

Note: "Each chip contains n transistors"

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P[C]=p^n

b) The memory module works with when even one of the chips is defective. It means it works either if 8 chips or 9 chips are ok. The probability of the chips failing is independent of each other.

We can calculate this as a binomial distribution problem, with n=9 and k≥8:

P[M]=P[C_9]+P[C_8]\\\\P[M]=\binom{9}{9}P[C]^9(1-P[C])^0+\binom{9}{8}P[C]^8(1-P[C])^1\\\\P[M]=P[C]^9+9P[C]^8(1-P[C])\\\\P[M]=p^{9n}+9p^{8n}(1-p^n)\\\\P[M]=p^{8n}(p^{n}+9(1-p^n))\\\\P[M]=p^{8n}(9-8p^n)

c)

P[M]=(0.999)^{8n}(9-8(0.999)^n)=0.9

This equation was solved graphically and the result is that the maximum number of chips to have a reliability of the memory module equal or bigger than 0.9 is 62 transistors per chip. See picture attached.

d) If the memoty module tolerates 2 defective chips:

P[M]=P[C_9]+P[C_8]+P[C_7]\\\\P[M]=\binom{9}{9}P[C]^9(1-P[C])^0+\binom{9}{8}P[C]^8(1-P[C])^1+\binom{9}{7}P[C]^7(1-P[C])^2\\\\P[M]=P[C]^9+9P[C]^8(1-P[C])+36P[C]^7(1-P[C])^2\\\\P[M]=p^{9n}+9p^{8n}(1-p^n)+36p^{7n}(1-p^n)^2

We again calculate numerically and graphically and determine that the maximum number of transistor per chip in this conditions is n=138. See graph attached.

6 0
3 years ago
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