I believe it’s the first answer
“They can be used in multiple places “
But I’m not sure!!
Answer:
Social networking capabilities could be made available by the presence of SBRUs central servers and local resort's server. For resorts that are using SBRU servers, there will be high bandwidth access to the internet. This can create a service level of 100% availability. However, for the resorts with high usage clients, a local server could be provided. Similar support will be needed and it will encourage local communication. The possible issues will be problems of connectivity, reliability as well as bandwidth.
Explanation:
Social networking capabilities could be made available by the presence of SBRUs central servers and local resort's server. For resorts that are using SBRU servers, there will be high bandwidth access to the internet. This can create a service level of 100% availability. However, for the resorts with high usage clients, a local server could be provided. Similar support will be needed and it will encourage local communication. The possible issues will be problems of connectivity, reliability as well as bandwidth.
Answer:
Computer random access memory (RAM) is one of the most important components in determining your system's performance. RAM gives applications a place to store and access data on a short-term basis. It stores the information your computer is actively using so that it can be accessed quickly.
Answer:
Analog computers are special purpose computer which can mesuare continuously changing data such as temperature, pressure, voltage,etc.
<u>Answer:</u>
a) First, we need to determine the pipeline stage amounting to the maximum time. In the given case, the maximum time required is 2ns for MEM. In addition, the pipeline register delay=0.1 ns.
Clock cycled time of the pipelined machine= max time+delay
=2ns+0.1 ns
=2.1 ns
b) For any processor, ideal CPI=1. However, since there is a stall after every four instructions, the effective CPI of the new machine is specified by:
c) The speedup of pipelined machine over the single-cycle machine=avg time per instruction of single cycle/avg time per instruction of pipelined.
Single cycle processor:
CPI=1
Clock period=7 ns
Pipelined processor:
Clock period=2.1 ns
CPI=1.25
Therefore, speedup=
=7/2.625
= 2.67
d) As the number of stages approach infinity, the speedup=k where k is the number of stages in the machine.
