Question

8.14 Consider a system in which bus cycles takes 500 ns. Transfer of bus control in either direction, from processor to I/O device or vice versa, takes 250 ns. One of the I/O devices has a data transfer rate of 50 KB/s and employs DMA. Data are transferred 1 byte at a time. a. Suppose we employ DMA in a burst mode. That is, the DMA interface gains bus mastership prior to the start of a block transfer and maintains control of the bus until the whole block is transferred. For how long would the device tie up the bus when transferring a block of 128 bytes? b. Repeat the calculation for cycle-​stealing mode.

Answer 1

Answer:

A) 2.56 ms

B) 128 μs

Explanation:

Time for Bus cycles = 500 ns

Transfer of bus control = 250 ns

I/0 device data transfer rate = 50 KB/s

Data are transferred at : 1 byte at a time

A) Determine how long the device tie up the bus when transferring a block of 128 bytes

Block size to be transferred = 128 bytes

Bandwidth = 50 KB/s

data transfer = (Block size ) / ( Bandwidth)

                     = ( 128 * 8 ) / ( 50 * 10^3 * 8 )

                     = ( 1024 ) / ( 50 * 10^3 * 8 )

                     = 2.56 ms

To determine the actual transfer time  we have to add up the transfer time for the bus control in both directions :

2.56 ms + 500 ns = 2.56 ms. this is because 500 ns is not a significant value

B) cycle stealing mode

In this mode each byte is transferred at a time and The total transfer time needed for the bus control in both directions will be double the total time i.e 2 * 500 ns = 1000 ns. because additional control time of  250 ns is required at both ends

since 1 byte is transferred at a time , 1 byte will be transferred in 1 μs

128 bytes = 128 *  1 μs = 128 μs