Answer: True
Explanation:
Variable length instructions generally implemented by CISC processors use memory more efficiently than fixed length instruction of RISC processors sets because CISC supports array whereas RISC does not. Also CISC uses more complex addressing modes which consumes less memory cycles and the the program is also reduces. In Fixed length instruction in RISC processor the simple instructions has to be used a number of time which leads to more memory cycles.
Most likely you would trade shares
Answer:
Start off with an interesting introduction (add questions) make it interesting.
