Explanation:
This transient state occurs due to the fact that the signal change from low to high and high to low doesn't occur intermediately but in a very small time, in relation to the signal time itself.
At transistor level there are parasitic (undesired) capacitances and resistances, formed due to the layout configuration of conductor and dielectrics. As consequence a RC circuit is formed, thus making a propagation delay.
This delay must be characterized for each circuit, and specified as tpHL (transition time from High to Low) and tpLH (transition time from Low to High)
