Answer:
- The program counter holds the memory address of the next instruction to be fetched from memory
- The memory address register holds the address of memory from which data or instructions are to be fetched
- The memory data register holds a copy of the memory contents transferred to or from the memory at the address in the memory address register
- The accumulator holds the result of any logic or arithmetic operation
Step-by-step explanation:
The specific contents of any of these registers at any point in time <em>depends on the architecture of the computer</em>. If we make the assumption that the only interface registers connected to memory are the memory address register (MAR) and the memory data register (MDR), then <em>all memory transfers of any kind</em> will use both of these registers.
For execution of the instructions at addresses 01 through 03, the sequence of operations may go like this.
1. (Somehow) The program counter (PC) is set to 01.
2. The contents of the PC are copied to the MAR.
3. A Memory Read operation is performed, and the contents of memory at address 01 are copied to the MDR. (Contents are the LDA #11 instruction.)
4. The MDR contents are decoded (possibly after being transferred to an instruction register), and the value 11 is placed in the Accumulator.
5. The PC is incremented to 02.
6. The contents of the PC are copied to the MAR.
7. A Memory Read operation is performed, and the contents of memory at address 02 are copied to the MDR. (Contents are the SUB 05 instruction.)
8. The MDR contents are decoded and the value 05 is placed in the MAR.
9. A Memory Read operation is performed and the contents of memory at address 05 are copied to the MDR. (Contents are the value 3.)
10. The Accumulator contents are replaced by the difference of the previous contents (11) and the value in the MDR (3). The accumulator now holds the value 11 -3 = 8.
11. The PC is incremented to 03.
12. The contents of the PC are copied to the MAR.
13. A Memory Read operation is performed, and the contents of memory at address 03 are copied to the MDR. (Contents are the STO 06 instruction.)
14. The MDR contents are decoded and the value 06 is placed in the MAR.
15. The Accumulator value is placed in the MDR, and a Memory Write operation is performed. Memory address 06 now holds the value 8.
16. The PC is incremented to 04.
17. Instruction fetch and decoding continues. This program will go "off into the weeds", since there is no Halt instruction. Results are unpredictable.
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Note that decoding an instruction may result in several different data transfers and/or memory and/or arithmetic operations. All of this is usually completed before the next instruction is fetched.
In modern computers, memory contents may be fetched on the speculation that they will be used. Adjustments need to be made if the program makes a jump or if executing an instruction alters the data that was prefetched.
. When you plug in the values from this particular case, the average rate of change formula becomes 
, or 
.