The systems development life cycle (SDLC) is a conceptual model used in project management that describes the stages involved in an information system development project, from an initial feasibility study through maintenance of the completed application. SDLC can apply to technical and non-technical systems.
Answer:
#include <bits/stdc++.h>
using namespace std;
// main function
int main()
{
// variables
double mexico = 114;
double usa = 312;
double mexicoRate = .0101;
double usaRate = .0015;
// calculate population after every year until mexico population exceed the usa populationn
while (usa>mexico)
{
// print the population
cout<<"Mexico's population ::"<<mexico<<" million."<<endl;
cout<<"USA's population ::"<<usa<<" million."<<endl;
// update the population
mexico+=mexico*mexicoRate;
usa-=usa*usaRate;
}
return 0;
}
Explanation:
Declare and initialize mexico and usa with their initial population.Also declare and initial their increase and decrease rate.Find the population of both the country each year until mexico population exceeds the usa population.
Output:
Mexico's population ::114 million.
USA's population ::312 million.
Mexico's population ::115.151 million.
USA's population ::311.532 million.
.
.
.
Mexico's population ::270.546million.
USA's population ::274.213 million.
Mexico's population ::273.278million.
USA's population ::273.802 million.
Answer:
find reliable resources
Explanation:
if you find reliable resources, than you might able to have more help i know im not answering..but im trynna help
Answer:
When an instruction is sent to the CPU in a binary pattern, how does the CPU know what instruction the pattern means
Explanation:
When the CPU executes the instructions, it interprets the opcode part of the instruction into individual microprograms, containing their microcode equivalents. Just so you know, a full assembly instruction consists of an opcode and any applicable data that goes with it, if required (register names, memory addresses).
The assembly instructions are assembled (turned into their binary equivalent 0s and 1s, or from now on, logic signals). These logic signals are in-turn interpreted by the CPU, and turned into more low-level logic signals which direct the flow of the CPU to execute the particular instruction.
