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Answer:
The time is
Explanation:
From the question we are told that
The period of the circuit is
Generally voltage maximization of the capacitor occurs during the voltage minimization of the inductor and vise versa
So the time between the voltage maximization of the capacitor and that of the inductor is mathematically represented as
=>
=>
The distance between slit and the screen is 1.214m.
To find the answer, we have to know about the width of the central maximum.
<h3>How to find the distance between slit and the screen?</h3>- It is given that, wavelength 560 nm passes through a slit of width 0. 170 mm, and the width of the central maximum on a screen is 8. 00 mm.
- We have the expression for slit width w as,
where, d is the distance between slit and the screen, and a is the slit width.
- Thus, distance between slit and the screen is,
Thus, we can conclude that, the distance between slit and the screen is 1.214m.
Learn more about the width of the central maximum here:
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