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Diano4ka-milaya [45]
3 years ago
5

Design a full adder circuit using NAND gates only (input : A, B, Cin and output = S, Cout).

Computers and Technology
1 answer:
stellarik [79]3 years ago
8 0

Solutions are easy to find on the web. It is important to understand that the full adder takes in a carry from the previous stage (and produces one), whereas a half adder only has A and B inputs and only produces a carry.

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If AL contains binary 1000 1111, which one will show the information of the binary bits in AL after performing operation SHR AL,
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Answer:

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In assembly language, shifting bits in registers is a common and important practice. One of the shifting operations is the SHR AL, x where the x specifies that the bits be shifted to the right by x places.

SHR AL, 2 therefore means that the bits contained in the AL should be shifted to the right by two (2) places.

For example, if the AL contains binary 1000 1111, the SHR AL, 2 operation will cause the following to happen

Original bit =>                                        |   1  |  0 |  0  |  0  |  1 |  1 |  1 |  1 |

Shift once to the right =>                |  1 |   0 |  0  |  0  |  1 |  1 |  1 |  1 | (0) |

Shift once to the right =>          |  1 |  0 |  0  |  0  |  1 |  1 |  1 |  1 | (0) | (0) |

Notice;

(i) that there are two shifts - one at a time.

(ii) that the bits in bold face are the bits in the AL after the shift. Those that in regular face are those in the carry flag.

(iii) that the new bits added to the AL after a shift are the ones in bracket. They are always set to 0.

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