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Rzqust [24]
3 years ago
12

Assume the system with 256B memory and 64B cache and the block size of 16 bytes. I.e., there are 4 blocks in the cache.

Computers and Technology
1 answer:
Arada [10]3 years ago
6 0

Answer:

a. 100%

b. 50%

c. 66.6%

Explanation:

a.

The memory references D6, 58, D8, 9A, DE and 5C all results in misses and the miss ratio is 100 (that is , 6 misses/ 6 references*100 = 100%)

b.

If fully associative cache is used, there will be a 3 cache misses with miss ratio of (3/6*100) = 50%.

c.

With a 2-way set-associative cache, 4 memory reference misses will occur, with a miss ratio of (4/6*100)= 66.6% misses.

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start

Declarations

     num test1

     num test2

     num test3

     num average

output "Enter score for test 1 or a negative number to quit"

input test1

while test1 >= 0

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     input test2

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