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Answer:
1. Processor communication -- this involves the following tasks:
<em>a. exchange of data between processor and I/O module</em>
<em>b. command decoding - I/O module accepts commands sent from the processor. E.g., the I/O module for a disk drive may accept the following commands from the processor: READ SECTOR, WRITE SECTOR, SEEK track, etc. </em>
<em>c. status reporting – The device must be able to report its status to the processor, e.g., disk drive busy, ready etc. Status reporting may also involve reporting various errors. </em>
<em>d. Address recognition – Each I/O device has a unique address and the I/O module must recognize this address. </em>
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2. Device communication – The I/O module must be able to perform device communication such as status reporting.
3. Control & timing – The I/O module must be able to co-ordinate the flow of data between the internal resources (such as processor, memory) and external devices.
4. Data buffering – This is necessary as there is a speed mismatch between speed of data transfer between processor and memory and external devices. Data coming from the main memory are sent to an I/O module in a rapid burst. The data is buffered in the I/O module and then sent to the peripheral device at its rate.
5. Error detection – The I/O module must also be able to detect errors and report them to the processor. These errors may be mechanical errors (such as paper jam in a printer), or changes in the bit pattern of transmitted data. A common way of detecting such errors is by using parity bits.
Answer:
0010
Explanation:
Serially left shifted means that the left most bit will enter the register first. The left most bit already stored in the register will move out of the sequence. The "bold" bits mentioned below highlight these left most bits:
Initial State of the Register:
0000
Group of bits entering:
1011
<u>First Clock Cycle:</u>
0000 <em>(This bold bit will move out)</em>
1011 <em>(This bold bit will move in from right side, shifting the whole sequence one place to the left).</em>
The resulting Sequence:
0001
<u>Second Clock Cycle:</u>
0001 <em>(This bold bit will move out)</em>
1011 <em>(This bold bit will move in from right side, shifting the whole sequence one place to the left).</em>
The resulting Sequence:
0010 <em>(Final Answer)</em>
Answer:
Bits
Explanation:
The protocol data unit is the representative unit of data in the OSI layer of a network. The OSI system has seven layers.
The physical layer is the first layer of the system and the protocol data unit is represented as bits of data.
Note that the term packet is the PDU for data in the network layer of the OSI network system.
Answer:
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