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mina [271]
3 years ago
13

Consider a CMOS inverter which has ideal transistors with the following characteristics: PMOS transistor: W/L = 2; Mobility (up)

= 72cm/V*s; threshold voltage = -0.4V nMOS transistor: W/L = 1; Mobility(un)= 180cmP/V*s; threshold voltage = 0.4V 180nm process; gate oxide capacitance/unit area = 8.6e-7 F/cm²; Vpp = 1.8V a) Calculate the B for each transistor, including the unites (3 points) b) What modes of operation is each transistor in when Vin=OV, 0.9V, and 1.8V? (3 points) c) Estimate the current through the inverter if Vin=0.9V. List any assumptions you make. (8 points) d) Would you expect the current to be higher or lower if the inverter was implemented in a 130nm process? Explain your answer. (6 points)
Engineering
1 answer:
yaroslaw [1]3 years ago
6 0

Answer:

The transistor will be in amplifier mode and we will expect current will be higher than expected.

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