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Ostrovityanka [42]
3 years ago
14

As you discovered in lab last week, the advantage of CMOS logic is that no drain current flows through the MOSFETs when the outp

ut is either high or low. Because the CMOS logic family is based on the inverter, the logic functions of NOT, NAND, and NOR

Engineering
1 answer:
Setler [38]3 years ago
5 0

Complete Question:

CMOS Logic

As you discovered in lab last week, the advantage of CMOS logic is that no drain current flows through the MOSFETs when the output is either high or low. Because the CMOS logic family is based on the inverter, the logic functions of NOT, NAND, and NOR are easy to create. The logic functions AND and OR, however, require us to build a NAND or NOR gate and then add an inverter to the gate output: AND = NAND+NOT

<em>Design a 2-input CMOS OR-gate using MOSFETs . Make certain that the power dissipation is zero when the output is both logic 1 and logic 0 . Add NOT logic to one of switches to the inputs of the OR gate .</em>

Answer and Explanation:

  • The question require you to design a 2 input CMOS
  • make certain that the power dissipation is zero when the output is both logic 1 and logic 0
  • Add NOT logic to one of the switches to the input of the OR gate

attached below is a diagram of the designed 2-input CMOS labelled with all the other features explicitly stated

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y =  yo + \frac{k}{\sqrt{x}}

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Replacing the equation for each condition:  

y = y_o + \frac{k}{\sqrt{(1 \times 10^{-2})}}\\\\\ \ \ \ \ \ \ 230 = yo + 10k\\\\ y = yo + \frac{k}{\sqrt{(6\times 10^{-3})}}\\\\275 = yo + 12.90k

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The equation is \sigma y = \sigma 0 + k y d^{\frac{1}{2}}

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