A hypothetical accumulator processor uses one of the following 16-bit instruction formats, depending on the instruction.(a) (10
points.) Draw a block diagram of this CPU, showing the sequencer, ALU, memory, and control and data registers, and use arrows to indicate how the various parts interact with each other. Assume that instructions and data are accessed using an MAR and MDR register. (This will be the Von Neumann architecture diagram of this processor, much like the one we created in class.)(b) (20 points.) Give a control unit design for this processor using D-flip-flops similar to the one we designed in the lectures for Vesp 1.0. The design should include fetch, decode and execute steps in as much detail as possible.(c) (20 points) Give a datapath design, also using D-flip-flops for the MDR register of this processor, clearly describing all the transfers into the MDR with the help of a typical flip-flop as we did in class by making sure that you completely specify both the data and clock inputs for that flip-flop.
1 answer:
You might be interested in
Answer:
the required diameter is 0.344 m
Explanation:
given data:
flow is laminar
flow of carbon dioxide Q = 0.005 Kg/s
for flow to be laminar, Reynold's number must be less than 2300 for pipe flow and it is given as
arrange above equation for diameter
\frac{\rho Q D}{\mu A }<2300
dynamic density of carbon dioxide = 1.47× Pa sec
density of carbon dioxide is 1.83 kg/m³
D = 0.344 m