Answer:
chip carriers
Explanation:
The components of a transistor or an integrated circuit are contained on a chip carrier. It is also frequently referred to as a chip container or chip package. With the help of this packaging, the chips can be connected or plugged into a circuit board without risking damage to their delicate components. As chip carriers have shrunk in size to accommodate new technologies, the procedure of installing them has grown more complicated.
Answer:
The overflow rate is 4.24×10^-4 m/s.
The detention time is 7069.5 s
Explanation:
Overflow rate is given as volumetric flow rate ÷ area
volumetric flow rate = 0.3 m^3/s
area = πd^2/4 = 3.142×30^2/4 = 706.95 m^2
Overflow rate = 0.3 m^3/s ÷ 706.95 m^2 = 4.24×10^-4 m/s
Detention time = volume ÷ volumetric flow rate
volume = area × depth = 706.95 m^2 × 3 m = 2120.85 m^3
Detention time = 2120.85 m^3 ÷ 0.3 m^3/s = 7069.5 s
Answer:
Modulus of resilience will be 
Explanation:
We have given yield strength 
Elastic modulus E = 104 GPa
We have to find the modulus
Modulus of resilience is given by
Modulus of resilience 
, here 
is yield strength and E is elastic modulus
Modulus of resilience 
Answer:
Architectural plans.
Explanation:
An architectural plan is called the drawings made by architects, civil engineers or designers of spaces or interiors, in which these professionals capture their building projects, organizing the distribution of the spaces to be used, the elements to be located in them and, fundamentally, to give construction planning a projection into reality. Thus, the plans help professionals to have a better understanding of the expected end result of the projects they are carrying out.
